• DocumentCode
    3469987
  • Title

    [Title page]

  • fYear
    2009
  • fDate
    4-7 Oct. 2009
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    The following topics are dealt with: disruptive computing technology; system power; thermal issues; timing analysis; optimization; hierarchical testing; design for test; synchronization; interconnects; clocking; energy efficient architectures; system level verification; system level testing; reliability; advanced memory; high performance architecture; processors; fault detection; logic design; memory design; application-optimized design; low voltage electronics; low power electronics; and cell layout.
  • Keywords
    design for testability; formal verification; logic design; logic testing; low-power electronics; memory architecture; microprocessor chips; multiprocessor interconnection networks; optimisation; power aware computing; reliability; synchronisation; timing; advanced memory; application-optimized design; cell layout; clocking; design for test; disruptive computing technology; energy efficient architectures; fault detection; hierarchical testing; high performance architecture; interconnects; logic design; low power electronics; low voltage electronics; memory design; optimization; processors; reliability; synchronization; system level testing; system level verification; system power; thermal issues; timing analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design, 2009. ICCD 2009. IEEE International Conference on
  • Conference_Location
    Lake Tahoe, CA
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4244-5029-9
  • Type

    conf

  • DOI
    10.1109/ICCD.2009.5413190
  • Filename
    5413190