Verification of a configurable processor core for system-on-a-chip designs

The verification of processor cores is very important for SOC design. In this paper we present a verification methodology that extends and enhances the traditional verification methodology to address the configurablility, debugability and other characteristics of processor cores. The proposed methodology has been taken into practice for the verification of a 32-bit embedded processor core - Godson-1 and practice results have proven its flexibility, applicability and good performance