DocumentCode
3470854
Title
SFG modeling for consistency checking of mixed-signal SoC
Author
Li, Zheying ; Li, Shuo ; Ma, Minjie ; Li, Li
Author_Institution
Inf. Sch., Beijing Union Univ.
Volume
2
fYear
2005
fDate
24-0 Oct. 2005
Firstpage
1066
Lastpage
1070
Abstract
This paper described a modeling method for consistency checking of IP blocks used in design of a mixed-signal SoC (MS SoC). The consistency includes four points in the MS SoC design to guarantee the IP blocks suitable for applications. The four points are architecture matching, parameter matching, time matching, and frequency matching. Based on the signal flow graph (SFG), the MS SoC constructed by different IP blocks can be a signal processing system including analog part and digital part. After adding two new definitions on an edge function, which is used for the description of the parameter consistency, a set of nodes and edges function becomes the base of the checking model. The checking model can describe the consistency of the architecture and the parameter including time and frequency matching
Keywords
mixed analogue-digital integrated circuits; signal flow graphs; system-on-chip; IP blocks; architecture matching; consistency checking; frequency matching; mixed-signal system-on-chip design; parameter matching; signal flow graph; time matching; Analog circuits; Design engineering; Digital circuits; Digital signal processing; Filters; Flow graphs; Frequency; Information technology; Manufacturing; Microelectronics;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2005. ASICON 2005. 6th International Conference On
Conference_Location
Shanghai
Print_ISBN
0-7803-9210-8
Type
conf
DOI
10.1109/ICASIC.2005.1611485
Filename
1611485
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