• DocumentCode
    3471439
  • Title

    Yield improvement by reducing charge-up damage of double polysilicon capacitors during via etch

  • Author

    Beugin, Virginie ; Richard, Max

  • Author_Institution
    ATMEL, Rousset, France
  • fYear
    2003
  • fDate
    24-25 April 2003
  • Firstpage
    85
  • Lastpage
    88
  • Abstract
    The charge-up damage on polysilicon capacitors during via etch has been investigated in flash memory devices by varying aspect ratio, power, strip, surface ratio and etch process. A possible explanation of the damage is presented.
  • Keywords
    capacitors; flash memories; integrated circuit yield; sputter etching; surface charging; C4F8 plasma characteristics; Si; Ti-TiN; Ti/TiN barrier metal deposition; aspect ratio; charge-up damage; double polysilicon capacitors; etch process; flash memory devices; polymer stripper; surface ratio; via etch; yield improvement; Capacitors; Chemistry; Circuits; Etching; Flash memory; Plasma applications; Plasma properties; Polymers; Testing; Tin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Plasma- and Process-Induced Damage, 2003 8th International Symposium
  • Print_ISBN
    0-7803-7747-8
  • Type

    conf

  • DOI
    10.1109/PPID.2003.1200924
  • Filename
    1200924
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3471439