DocumentCode
3472021
Title
Compact 1.8 V low-power CMOS operational amplifier cells for VLSI
Author
de Langen, K.-J. ; Huijsing, J.H.
Author_Institution
Inst. for Microelectron. & Submicron Technol., Delft Univ. of Technol., Netherlands
fYear
1997
fDate
8-8 Feb. 1997
Firstpage
346
Lastpage
347
Abstract
The continuing down-scaling of CMOS processes has two consequences for the design of mixed-mode VLSI circuits. First, the supply voltage will go down from the present 5 V to 3 V and subsequently to 2 V, because the smaller dimensions result in a reduction of the breakdown voltage. Second, the circuit density possible increases. To meet the VLSI demands, compact topologies are needed that can operate on supply voltages between 1 and 2 V, depending on threshold voltages of the transistors. Existing CMOS opamps are compact but cannot operate at supply voltages below 2.5 V or otherwise have a complicated structure. The authors present a compact opamp which operates on supply voltage down to one gate-source voltage and two saturation voltages which amounts to 1.8 V. The opamp consists of two stages, an input stage and, a rail-to-rail output stage. An intermediate part contains current sources and a current mirror that sums the differential signals from the input stage and, cascodes that provide gain.
Keywords
CMOS analogue integrated circuits; VLSI; differential amplifiers; operational amplifiers; 1.6 micron; 1.8 V; CMOS operational amplifier cells; VLSI; compact topology; low supply voltage; low-power CMOS op amp; rail-to-rail output stage; CMOS process; CMOS technology; Circuits; Impedance; Mirrors; Operational amplifiers; Paper technology; Threshold voltage; Very large scale integration; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-3721-2
Type
conf
DOI
10.1109/ISSCC.1997.585413
Filename
585413
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