Statistical Modeling and Design

New technologies are continually being developed that enable designers to create faster, more complex circuits, packed within a shrinking die. However, along with the promise of speed and density comes the challenge of variability, as intradie device mismatch looms proportionately greater. To deliver new products in a timely and cost effective manner, the designer must have the methods and tools to validate the robustness of his design before committing it to silicon. This paper will discuss how statistical models can be implemented via Spectre models customized for the cadence analog design environment