• DocumentCode
    3473309
  • Title

    CrtSmile: a CAD tool for CMOS RF transistor substrate modeling incorporating layout effects

  • Author

    Li, Zhao ; Suravarapu, Ravikanth ; Hartono, Roy ; Bhattacharya, Sambuddha ; Mayaram, K. ; Shi, Richard

  • Author_Institution
    Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
  • fYear
    2004
  • fDate
    27-30 Jan. 2004
  • Firstpage
    163
  • Lastpage
    168
  • Abstract
    We present a new CAD tool CrtSmile, which automatically incorporates transistor layout effects for CMOS RF transistor modeling with an emphasis on substrate resistance extraction. The RF transistor layouts in the CIF/GDSII format are used to generate a layout dependent substrate model that can be included as a subcircuit with the BSIM3 device model. To support multifinger RF transistor layout/bulk recognition, a pattern based layout extraction method is presented. CrtSmile incorporates a scalable substrate model for multifinger transistors, which is dependent on transistor layout/bulk patterns and geometric layout information, such as the number of gate fingers, finger width, channel length, and bulk contact locations. This model is simple to extract and gives good agreement with the measured data for a 0.35 μm CMOS process. A low noise amplifier design is evaluated with the new layout dependent substrate model and the proposed tool, showing the importance of CMOS RF transistor layout on substrate resistance modeling.
  • Keywords
    CMOS integrated circuits; MOSFET; circuit layout CAD; computational geometry; integrated circuit layout; integrated circuit modelling; substrates; transistors; BSIM3 device model; CMOS RF transistor substrate modeling; CrtSmile CAD tool; RF transistor layout; geometric layout information; low noise amplifier design; multifinger RF transistor layout; pattern based layout extraction method; substrate resistance extraction; CMOS process; Data mining; Electrical resistance measurement; Fingers; Low-noise amplifiers; Pattern recognition; Radio frequency; Radiofrequency amplifiers; Semiconductor device modeling; Solid modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific
  • Print_ISBN
    0-7803-8175-0
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2004.1337559
  • Filename
    1337559