DocumentCode
3473612
Title
Chip Design and Analysis based on a LRC Speech Algorithm
Author
Ri Sheng Xia ; Chang Nian Zhang ; Yan Feng Jiang ; Yan Feng ; Jiang
Author_Institution
North China Univ. of Technol., Beijing
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
2006
Lastpage
2008
Abstract
A low bit rate coding speech algorithm is introduced in this paper. This algorithm can make the bit rate lower than MBE under good speech quality, and its bit rate can reach to 2kbps. Meanwhile we discuss the chip design based on this algorithm, analyzing the process of designing speech chip using Motorola C_CORE. Finally we describe the principle of this coding algorithm and explain the difference between this algorithm with others.
Keywords
codecs; integrated circuits; speech coding; LRC speech algorithm; Motorola C_CORE; chip analysis; chip design; coding speech algorithm; spectrum envelop parameter; speech chip; Algorithm design and analysis; Bit rate; Chip scale packaging; Decoding; Filters; Frequency; Predictive models; Speech analysis; Speech coding; Speech synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Type
conf
DOI
10.1109/ICSICT.2006.306576
Filename
4098607
Link To Document