Parameterized FIR Filtering IP Cores for Reusable SoC Design

Author

Farooq, Umar ; Saleem, Muhammad ; Jamal, Habibullah

Author_Institution

Dept. of Electr. Eng., Univ. of Eng. & Technol., Taxila

fYear

2006

fDate

10-12 April 2006

Firstpage

554

Lastpage

559

Abstract

In this paper, intellectual property (IP) cores for unfolded direct form (UDF) and folded direct form (FDF) FIR filters are presented. The proposed IP cores are parameterized and programmable in terms of data bits, coefficient bits, filter order and the type of filter (low pass, high pass, band pass etc). The IP cores are implemented for 8 bit and 16 bit data and coefficient widths on XC3sl000ft256-4 device. The parameterized IP cores can be used for reusable system-on-chip (SoC) design. Core architectures of UDF and FDF FIR Filter are described in detail and favorable results for area/speed performance are reported

Keywords

FIR filters; industrial property; integrated circuit design; logic design; system-on-chip; FDF FIR filter; UDF FIR filter; XC3sl000ft256-4 device; coefficient bits; core architectures; data bits; filter order; finite impulse response filter; folded direct form; intellectual property cores; parameterized FIR filtering IP cores; reusable SoC design; reusable system-on-chip design; synthesis tools; unfolded direct form; Band pass filters; Costs; Design methodology; Digital filters; Filtering; Finite impulse response filter; Hardware design languages; Intellectual property; Productivity; Throughput; Finite Impulse Response (FIR); Folded Direct; Form (FDF); IP Core; Parameterized; SoC design; Synthesis tools; Unfolded Direct Form (UDF); filter;

fLanguage

English

Publisher

ieee

Conference_Titel

Information Technology: New Generations, 2006. ITNG 2006. Third International Conference on

Conference_Location

Las Vegas, NV

Print_ISBN

0-7695-2497-4

Type

conf

DOI

10.1109/ITNG.2006.108

Filename

1611651