DocumentCode
347660
Title
IDDQ testing in deep submicron integrated circuits
Author
Miller, Anthony C.
Author_Institution
Intel Corp., Chandler, AZ, USA
fYear
1999
fDate
1999
Firstpage
724
Lastpage
729
Abstract
The increased background leakage current of deep submicron devices threatens the practical application of the traditional IDDQ test. This paper describes a new Delta IDDQ test technique which has proven effective at defect detection for deep submicron memory and logic devices
Keywords
CMOS digital integrated circuits; CMOS memory circuits; SRAM chips; electric current measurement; fault diagnosis; integrated circuit testing; leakage currents; logic testing; microprocessor chips; CMOS process technology; Delta IDDQ test technique; IDDQ testing; SRAM testing; background leakage current; deep submicron integrated circuits; deep submicron logic devices; deep submicron memory devices; defect detection; microprocessor testing; signature analysis; CMOS process; CMOS technology; Circuit testing; Graphics; Integrated circuit testing; Leakage current; Logic testing; Materials testing; Measurement standards; Temperature measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1999. Proceedings. International
Conference_Location
Atlantic City, NJ
ISSN
1089-3539
Print_ISBN
0-7803-5753-1
Type
conf
DOI
10.1109/TEST.1999.805801
Filename
805801
Link To Document