• DocumentCode
    3487056
  • Title

    FastRoute3.0: A fast and high quality global router based on virtual capacity

  • Author

    Zhang, Yanheng ; Xu, Yue ; Chu, Chris

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA
  • fYear
    2008
  • fDate
    10-13 Nov. 2008
  • Firstpage
    344
  • Lastpage
    349
  • Abstract
    As an easily implemented approach, ripup and reroute has been employed by most of todaypsilas global routers, which iteratively applies maze routing to refine solution quality. But traditional maze routing is susceptible to get stuck at local optimal results. In this work, we will present a fast and high quality global router FastRoute3.0, with the new technique named virtual capacity. Virtual capacity is proposed to guide the global router at maze routing stage to achieve higher quality results in terms of overflow and runtime. During maze routing stage, virtual capacity works as a substitute for the real edge capacity in calculating the maze routing cost. There are two sub techniques included: (1) virtual capacity initialization, (2) virtual capacity update. Before the maze routing stage, FastRoute3.0 initializes the virtual capacity by subtracting the predicted overflow generated by adaptive congestion estimation (ACE) from the real edge capacity. And in the following maze routing iterations, we further reduce the virtual capacity by the amount of existing overflow(edge usage minus real edge capacity) for the edges that are still congested. To avoid excessive ldquopushing-awayrdquo of routing wires, the virtual capacity is increased by a fixed percentage of the existing overflow if edge usage is smaller than real edge capacity. Experimental results show that FastRoute3.0 is highly proficient dealing with ISPD98, ISPD07 and ISPD08 benchmark suites. The results outperform published ripup and reroute based academic global routers in both routability and runtime. In particular, (1) FastRoute3.0 completes routing all the ISPD98 benchmarks. (2) For ISPD07 and ISPD08 global routing contest benchmarks, it generates 12 out of 16 congestion free solutions. (3) The total runtime is enhanced greatly.
  • Keywords
    VLSI; benchmark testing; circuit layout CAD; integrated circuit design; network routing; ISPD07 benchmark; ISPD08 benchmark; ISPD98 benchmark; VLSI design; adaptive congestion estimation; global router FastRoute3.0; maze routing stage; real edge capacity; virtual capacity; Circuits; Cost function; Iterative methods; Routing; Runtime; Timing; Very large scale integration; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1092-3152
  • Print_ISBN
    978-1-4244-2819-9
  • Electronic_ISBN
    1092-3152
  • Type

    conf

  • DOI
    10.1109/ICCAD.2008.4681596
  • Filename
    4681596