DocumentCode
3489962
Title
Process-induced SOI strain via sacrificial Ge-Si
Author
Connelly, Daniel ; Clifton, Paul
Author_Institution
Acorn Technol., Palo Alto, CA
fYear
2008
fDate
15-19 Sept. 2008
Firstpage
294
Lastpage
297
Abstract
We present here, for the first time, a method of introducing strain into Si, for example ultra-thin SOI, with a sacrificial strained GexSi1-x layers. Etching proximate trenches into the GexSi1-x-Si stack causes the stack to relax, transferring strain from the surface GexSi1-x into the buried Si. Filling the trenches locks the strain in place, where it remains after the GexSi1-x is removed. This method can be combined with more conventional stress engineering, such as strained trench fills, strained source/drain epitaxy, or strained overlayers.
Keywords
elemental semiconductors; etching; field effect transistors; silicon; silicon-on-insulator; FET; Si; etching; process-induced SOI strain; sacrificial strained layers; source-drain epitaxy; ultrathin SOI; Annealing; Capacitive sensors; Etching; Filling; Silicon alloys; Surface tension; Tensile strain;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference, 2008. ESSDERC 2008. 38th European
Conference_Location
Edinburgh
ISSN
1930-8876
Print_ISBN
978-1-4244-2363-7
Electronic_ISBN
1930-8876
Type
conf
DOI
10.1109/ESSDERC.2008.4681756
Filename
4681756
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