DocumentCode
3490598
Title
Key attributes of an SRAM testing strategy required for effective process monitoring
Author
Khare, J. ; Griep, S. ; Oberle, H.-D. ; Maly, Wojciech ; Schmitt-Landsiedel, D. ; Kollmer, U. ; Walker, D.M.H.
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
1993
fDate
9-10 Aug 1993
Firstpage
84
Lastpage
89
Abstract
Yield learning-a key process in assuring manufacturing efficiency-must be based on effective defect diagnostic procedures. One such procedure, using measurements of SRAMs and a computer-generated defect-fault dictionary, is presented in this paper. The discussion is focused on the `resolution of diagnosis´, which is the ability to resolve as large a variety of defects as possible. To assess the resolution limits, an experiment involving dictionary generation and SRAM testing was conducted. The test results were compared against simulated bitmaps, and the differences were analyzed using failure analysis. The results obtained confirmed that defect simulation-based diagnosis can be very effective. It can also be enhanced if appropriate SRAM designs, testing strategies and defect models are chosen
Keywords
SRAM chips; failure analysis; integrated circuit manufacture; integrated circuit testing; monitoring; production testing; SRAM testing strategy; computer-generated defect-fault dictionary; defect diagnostic procedures; dictionary generation; failure analysis; manufacturing; process monitoring; resolution limits; simulated bitmaps; yield learning; Computer aided manufacturing; Computerized monitoring; Dictionaries; Failure analysis; Manufacturing processes; Random access memory; Research and development; Semiconductor device manufacture; Testing; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Testing, 1993., Records of the 1993 IEEE International Workshop on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-4150-9
Type
conf
DOI
10.1109/MT.1993.263144
Filename
263144
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