Systematic Gate Stack Optimization to Maximize Mobility with HfSiON EOT Scaling

Author

Quevedo-Lopez, M.A. ; Kirsch, P.D. ; Krishnan, S. ; Alshareef, H.N. ; Barnett, J. ; Harris, H.R. ; Neugroschel, A. ; Aguirre-Tostado, F.S. ; Gnade, B.E ; Kim, M.J. ; Wallace, R.M. ; Lee, B.H.

Author_Institution

SEMATECH, Austin, TX

fYear

2006

fDate

Sept. 2006

Firstpage

113

Lastpage

116

Abstract

A systematic study to optimize gate stack constituents (interface, high- K, metal gate) to maximize carrier mobility with aggressively scaled equivalent oxide thickness (EOT) is presented. We identify ultra-thin thermal oxide, atomic layer deposited HfSiON and optimized plasma nitridation performed in sequence as the optimized run path for sub-nm EOT scaling with high carrier mobility. A metal gate deposition process that minimizes the incorporation of impurities in HfSiON is also vital to maintaining good mobility at low EOTs

Keywords

atomic layer deposition; carrier mobility; electrodes; high-k dielectric thin films; plasma materials processing; EOT scaling; HfSiON; atomic layer deposition; carrier mobility; equivalent oxide thickness; impurities incorporation; metal gate deposition process; plasma nitridation; systematic gate stack optimization; ultra-thin thermal oxide; Annealing; Atomic layer deposition; Chemicals; Dielectrics; Electrodes; Hafnium oxide; Nitrogen; Semiconductor films; Stress; Thermal degradation;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European

Conference_Location

Montreux

ISSN

1930-8876

Print_ISBN

1-4244-0301-4

Type

conf

DOI

10.1109/ESSDER.2006.307651

Filename

4099869