Characterization of shallow junction transistors manufactured with plasma doping

The National Technology Roadmap for Semiconductors calling for shallow junctions drives the exploration of alternate doping technologies, one of which is plasma doping (PLAD). There are many important issues when evaluating these technologies, but two of the most critical are device performance and contamination. This paper reports results on devices with various channel lengths manufactured by the plasma doping technique. Transistors fabricated with 250 nm technology, 65 A gate oxide, were tested for various device characteristics, such as threshold voltage and transconductance