DocumentCode
3496548
Title
A MULTINEURO computer system by using high performance digital neuro processor
Author
Saito, Takashi ; Baba, Yasushi ; Gawa, Koichi Naka ; Fuwa, Yutaka ; Shimokawa, Yoshiyuki
Author_Institution
Dept. of Microelectron. Syst. Instrum., Toshiba Corp., Tokyo, Japan
fYear
1995
fDate
26-28 Jul 1995
Firstpage
1419
Lastpage
1424
Abstract
We have developed an accelerator device “MULTINEURO-A” which incorporates multiple processors (one master node and plural slave nodes) dedicated to neural network high-speed computing realized on an engineering workstation. Nodes are connected by two data paths, broadcast bus and ring bus. Processing speed is in proportion to the number of processors. It is built in two boards (master and slave) having 64 VLSI processors that offers to 1.5 billion connections per seconds. It processes forward/backward calculation of multilayer perceptron type neural networks, feedback type neural networks such as Hopfield model, and any other types by programming for parallel processing
Keywords
Hopfield neural nets; VLSI; engineering workstations; multilayer perceptrons; multiprocessing systems; neural nets; special purpose computers; system buses; Hopfield neural networks; MULTINEURO-A; VLSI processors; accelerator device; broadcast bus; engineering workstation; feedback neural networks; forward/backward calculation; high performance digital neuro processor; multilayer perceptron; multiple processors; neural network high-speed computing; parallel processing; ring bus; Computer networks; Feedforward neural networks; High performance computing; Hopfield neural networks; Master-slave; Multi-layer neural network; Multilayer perceptrons; Neural networks; Very large scale integration; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
SICE '95. Proceedings of the 34th SICE Annual Conference. International Session Papers
Conference_Location
Hokkaido
Print_ISBN
0-7803-2781-0
Type
conf
DOI
10.1109/SICE.1995.526722
Filename
526722
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