• DocumentCode
    3497765
  • Title

    Memristor-based approximated computation

  • Author

    Boxun Li ; Yi Shan ; Miao Hu ; Yu Wang ; Yiran Chen ; Huazhong Yang

  • Author_Institution
    Dept. of E.E., Tsinghua Univ., Beijing, China
  • fYear
    2013
  • fDate
    4-6 Sept. 2013
  • Firstpage
    242
  • Lastpage
    247
  • Abstract
    The cessation of Moore´s Law has limited further improvements in power efficiency. In recent years, the physical realization of the memristor has demonstrated a promising solution to ultra-integrated hardware realization of neural networks, which can be leveraged for better performance and power efficiency gains. In this work, we introduce a power efficient framework for approximated computations by taking advantage of the memristor-based multilayer neural networks. A programmable memristor approximated computation unit (Memristor ACU) is introduced first to accelerate approximated computation and a memristor-based approximated computation framework with scalability is proposed on top of the Memristor ACU. We also introduce a parameter configuration algorithm of the Memristor ACU and a feedback state tuning circuit to program the Memristor ACU effectively. Our simulation results show that the maximum error of the Memristor ACU for 6 common complex functions is only 1.87% while the state tuning circuit can achieve 12-bit precision. The implementation of HMAX model atop our proposed memristor-based approximated computation framework demonstrates 22× power efficiency improvements than its pure digital implementation counterpart.
  • Keywords
    circuit feedback; circuit tuning; memristors; multilayers; neural nets; programmable circuits; HMAX model; Moore law; feedback state tuning circuit; memristor ACU; memristor-based multilayer neural networks; parameter configuration algorithm; power efficiency; programmable memristor approximated computation unit; Accuracy; Approximation methods; Arrays; Memristors; Noise; Resistance; Tuning; approximated computation; memristor; neuromorphic; power efficiency;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics and Design (ISLPED), 2013 IEEE International Symposium on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4799-1234-6
  • Type

    conf

  • DOI
    10.1109/ISLPED.2013.6629302
  • Filename
    6629302