• DocumentCode
    3499199
  • Title

    Optimizing test-generation to the execution platform

  • Author

    Nahir, Amir ; Ziv, Avi ; Panda, Subrat

  • Author_Institution
    IBM Res., Haifa, Israel
  • fYear
    2012
  • fDate
    Jan. 30 2012-Feb. 2 2012
  • Firstpage
    304
  • Lastpage
    309
  • Abstract
    The role of stimuli generators is to reach all the dark corners of the design and expose the bugs hiding there. As such, stimuli generation is one of the cornerstones of dynamic verification. The quality of tools used for stimuli generation affect the outcome of the verification process. This paper discusses how differences between execution platforms, ranging from software simulators, through accelerators and emulators, to silicon affect the requirements of stimuli generators and how stimuli generators targeting different execution platforms address these differences. We demonstrate how the unique added value of the platforms are combined to guarantee the high quality of the silicon using examples of several IBM pre- and post-silicon stimuli generators with results from the verification of the IBM POWER7 processor chip.
  • Keywords
    formal verification; multiprocessing systems; program debugging; IBM POWER7 processor chip verification; IBM post-silicon stimuli generator; IBM pre-silicon stimuli generator; accelerator; bugs hiding; dynamic verification; emulator; execution platform; software simulator; stimuli generation; test-generation optimization; Acceleration; Computer architecture; Generators; Instruction sets; Observability; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific
  • Conference_Location
    Sydney, NSW
  • ISSN
    2153-6961
  • Print_ISBN
    978-1-4673-0770-3
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2012.6164964
  • Filename
    6164964