• DocumentCode
    3499972
  • Title

    Fast interconnect parasitic extraction in deep submicron using bin-based algorithm

  • Author

    Ferreira, Fabio ; Reis, Ricardo ; Moraes, Fernando

  • Author_Institution
    Instituto de Informatica, Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
  • Volume
    3
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    1148
  • Abstract
    Presents a fast interconnect capacitance extraction tool (wire extractor) LASCA, which considers the lateral coupling, ground and crossover capacitances. Using the bin-based algorithm to extract connectivity, empirical formulation and a simple 2½D methodology, we provide a good trade-off between accuracy and efficiency when compared to traditional layout extraction. Comparisons between our wire extractor with the Diva extractor (Cadence design Systems), give an average difference of only 5% in the final delay of some benchmarks, being up to 30 times faster than Diva
  • Keywords
    VLSI; capacitance; circuit layout CAD; integrated circuit interconnections; integrated circuit layout; LASCA; benchmarks; bin-based algorithm; capacitance extraction tool; crossover capacitances; deep submicron integrated circuits; efficiency; ground capacitances; interconnect parasitic extraction; lateral coupling; wire extractor; Data mining; Data structures; Delay effects; Design methodology; Feeds; Integrated circuit interconnections; Integrated circuit technology; Libraries; Parasitic capacitance; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
  • Conference_Location
    Lansing, MI
  • Print_ISBN
    0-7803-6475-9
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2000.951418
  • Filename
    951418