CMOS RF low-noise amplifier design for wireless communication

Author

Li, Qiang ; Yuan, Jiann S.

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Central Florida Univ., Orlando, FL, USA

Volume

3

fYear

2000

fDate

2000

Firstpage

1306

Abstract

Design and optimization of a CMOS low-noise amplifier have been presented. Typical noise parameters such as minimum noise figure,, equivalent noise resistance, and optimum source conductance using deep submicron CMOS technology including effect of bias-dependent gate resistance of the MOSFET are derived. Noise parameters, gain, and power consumption are simultaneously optimized using closed-form analytical equations. The analytical equations provide fast turn-around design time in mixed-signal ICs for telecommunication applications

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; integrated circuit design; integrated circuit noise; low-power electronics; CMOS; RF low-noise amplifier; bias-dependent gate resistance; closed-form analytical equations; design time; equivalent noise resistance; minimum noise figure; mixed-signal ICs; noise parameters; optimum source conductance; power consumption; telecommunication applications; wireless communication; CMOS technology; Circuit noise; Equations; Low-frequency noise; Low-noise amplifiers; MOSFET circuits; Noise figure; Radio frequency; Signal to noise ratio; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on

Conference_Location

Lansing, MI

Print_ISBN

0-7803-6475-9

Type

conf

DOI

10.1109/MWSCAS.2000.951455

Filename

951455