Efficient multiplier architecture using optimized irreducible polynomial over GF((3n)3)

In this paper a multiplication algorithm over GF((3ⁿ) ³) is presented and a method of constructing a multiplier is described. The architecture is based on a modified version of the Karatsuba-Ofman algorithm (KOA) and can be applied to the multiplication of polynomials over ((3ⁿ)³). By determining optimized field polynomials of degree three, the last stage of the KOA and the module reduction can be combined. Finite fields are referred to as composite fields. This is a parallel canonical basis multiplier with low gate counts and low delay. The architectures are highly modular and well suited for VLSI implementation