Embedded active device packaging technology based on organic substrate

Increasingly aggressive requirements for higher density, expanded functionality, and greater miniaturization of active devices at the substrate/package level have elicited considerable interest in Embedded Device Technology. In this paper, we illustrate the design, fabrication and testing of embedded MOSFET dies to exemplify the viability of this emerging technology. The impetus of this heuristic study is to develop a practical solution that is conducive to reduced manufacturing costs and truncated time-to-market product development cycles. Thus, we propose a streamlined methodology involving the simulation, optimization and fabrication of active chips embedded in organic substrates by employing a novel hybrid manufacturing process. Emphasis is placed on the simulation of thermal loading conditions and thermal-mechanical properties. It is imperative to incorporate sufficient thermal margins to ensure the viability of the fabricated embedded devices. Optimized thermal-loading and thermal-mechanical designs of the embedded MOSFET die are efficiently facilitated by numerical simulations based on Finite Element Analyses (FEA). Finally, resistance and functional tests of the fabricated embedded MOSFET have been performed thereby demonstrating the viability of the manufacturing process for embedding active devices.