DocumentCode
3512491
Title
Experimental analysis of a cascaded multilevel inverter using Buck EIE converters
Author
Costa, Natália M A ; De Freitas, Luiz C. ; Batista, V.J. ; Coelho, Ernane A A ; Farias, Valdeir J. ; Freitas, Luiz C G
Author_Institution
Fac. de Eng. Eletr. (FEELT), Univ. Fed. de Uberlandia (UFU), Uberlandia, Brazil
fYear
2012
fDate
5-9 Feb. 2012
Firstpage
1659
Lastpage
1666
Abstract
The multilevel inverters are pointed in the literature as one of the most suitable solutions for high-power applications, in medium and high voltage levels. These inverters are based on the association of converters, either in parallel or in series, aiming to process a smaller amount of the total output power in each converter. Generally, the output voltage and/or current is a staircase waveform and the output voltage has low harmonic distortion. In this context, a novel approach on cascaded multilevel inverters is presented in this paper. The proposed topology is based on the cascaded association of Buck EIE inverters, developed from the EIE active commutation cell. The output voltage is totally controlled and follows a desired reference signal, which assures low harmonic distortion without the necessity of using passive filters on the converter output. The voltage stress levels over the power semiconductor devices, especially switches and diodes, are kept low even for high voltage applications. Detailed circuit description is given as well as simulation and experimental results of a Multilevel Buck EIE Inverter prototype, in order to confirm the operation principles of the proposed topology.
Keywords
harmonic distortion; invertors; power convertors; voltage control; EIE active commutation cell; buck EIE converters; cascaded multilevel inverter; diodes; experimental analysis; harmonic distortion; high-power applications; high-voltage level; medium-voltage level; multilevel buck EIE inverter prototype; power semiconductor devices; switches; voltage control; voltage stress levels; Capacitors; Inductors; Inverters; Semiconductor diodes; Stress; Topology; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition (APEC), 2012 Twenty-Seventh Annual IEEE
Conference_Location
Orlando, FL
Print_ISBN
978-1-4577-1215-9
Electronic_ISBN
978-1-4577-1214-2
Type
conf
DOI
10.1109/APEC.2012.6166043
Filename
6166043
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