Eliminating pinholes in CSS deposited CdS films

The open circuit voltage of cadmium telluride CdTe solar cells is strongly related to the cadmium sulfide CdS film thickness. It has been shown that thinning the window layer film can increase the short circuit current of the solar cell, but thinner CdS films tend to have more discontinuities and defects such as pinholes. These pinholes form weak CdTe/TCO diodes that decrease Voc and consequently device efficiency. Artificial sources of pinholes are the main focus in this study. This work focused on studying pinholes in CdS films of thicknesses ranging between 200nm and 50nm. Three experiments were conducted; the first was utilizing a class 1 mini-environment to eliminate dust and particulates collected on glass substrates prior to film deposition, the second experiment utilized a plasma cleaner to test the effects of plasma cleaning on pinhole elimination and the third experiment focused on studying pinholes on thinner CdS thicknesses. Experiment results indicate that cleaning substrates using plasma cleaners almost eliminated pinholes in CSS deposited CdS films for all film thicknesses.