Effective full-duplex Mesochronous Link Architecture for Network-on-Chip Data-Link layer

The increasing complexity of system on chip (SoC) architectures and the physical issues due to the CMOS technology scaling, led to explore new solutions to build effective on-chip interconnection and communication infrastructures. Network on chip (NoC) paradigm has been proposed as architectural solution mainly for overcoming scalability and flexibility limitations. However, advanced techniques to mitigate wire-delay effects have to be employed to reduce the impact of physical issues. Globally asynchronous locally synchronous (GALS) paradigm has been selected to this purpose as solution to implement the NoC physical layer, and many different approaches to design GALS-based NoC can be used. In this paper a full-duplex mesochronous link architecture, for which a patent has been submitted, is proposed to effectively implement the GALS paradigm in the STNoCtrade system. Such a link, exploiting the service provided by the newest mesochronous physical layer known as SKIL, effectively implements the mesochronous communication at data-link layer and enables to overcome some important issues of the previous mesochronous solutions.