Highly Optimized Nanocrystal-Based Split Gate Flash for High Performance and Low Power Microcontroller Applications

Author

Yater, Jane ; Hong, C. ; Kang, S.-T. ; Kolar, D. ; Min, B. ; Shen, J. ; Chindalore, G. ; Loiko, K. ; Winstead, B. ; Williams, S. ; Gasquet, H. ; Suhail, M. ; Broeker, K. ; Lepore, E. ; Hardell, A. ; Malloch, W. ; Syzdek, R. ; Chen, Y. ; Ju, Y. ; Kumarasam

Author_Institution

Microcontroller Solutions Group, Freescale Semicond., Inc., Austin, TX, USA

fYear

2011

fDate

22-25 May 2011

Firstpage

1

Lastpage

4

Abstract

We show a 90nm nanocrystal-based split gate embedded flash memory that is able to meet the speed, endurance and reliability requirements for 32-bit microcontroller products. A 3.4V operating window is achievable and the process is robust and repeatable across many lots. Erase after 10k cycles can be achieved in 5ms, long-term data retention of cycled arrays is not susceptible to SILC-induced charge loss mechanisms, and program disturb can meet the needs of flash and EEPROM.

Keywords

flash memories; microcontrollers; semiconductor device reliability; EEPROM; highly optimized nanocrystal-based split gate flash memory; low power microcontroller application; reliability requirements; size 90 nm; time 5 ms; voltage 3.4 V; word length 32 bit; Acceleration; Arrays; Logic gates; Microcontrollers; Nanocrystals; Programming; Reliability;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Workshop (IMW), 2011 3rd IEEE International

Conference_Location

Monterey, CA

Print_ISBN

978-1-4577-0225-9

Electronic_ISBN

978-1-4577-0224-2

Type

conf

DOI

10.1109/IMW.2011.5873213

Filename

5873213