• DocumentCode
    351962
  • Title

    Detection of CMOS defects under variable processing conditions

  • Author

    Germida, Amy ; Plusquellic, James

  • Author_Institution
    Dept. of CSEE, Maryland Univ., Baltimore, MD, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    195
  • Lastpage
    201
  • Abstract
    Transient signal analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points. In this paper, the power supply transient signals from simulation experiments on an 8-bit multiplier are analyzed at multiple test points in both the time and frequency domain. Linear regression analysis is used to separate and identify the signal variations introduced by defects and those introduced by process variation. Defects were introduced into the simulation model by adding material (shorts) or removing material (opens) from the layout. 246 circuit models were created and 1440 simulations performed on defect-free, bridging defective and open defective circuits in which process variation was modeled by varying circuit and transistor parameters within a range of ±25% of the nominal parameters. The results of the analysis show that it is possible to distinguish between defect-free and defective devices with injected process variation
  • Keywords
    CMOS integrated circuits; frequency-domain analysis; integrated circuit testing; logic testing; multiplying circuits; statistical analysis; time-domain analysis; transient analysis; 8 bit; CMOS defects; bridging defective circuits; frequency domain; injected process variation; linear regression analysis; multiple test points; open defective circuits; power supply transient signals; process variation; signal variations; simulation model; time domain; transient signal analysis; transistor parameters; variable processing conditions; voltage transients; Analytical models; CMOS process; Circuit simulation; Circuit testing; Frequency domain analysis; Linear regression; Power supplies; Signal analysis; Transient analysis; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 2000. Proceedings. 18th IEEE
  • Conference_Location
    Montreal, Que.
  • ISSN
    1093-0167
  • Print_ISBN
    0-7695-0613-5
  • Type

    conf

  • DOI
    10.1109/VTEST.2000.843846
  • Filename
    843846