Analysis of power/ground noise effect on performance degradation of analog-to-digital converter

Author

Ahn, Woojin ; Shim, Jongjoo ; Cho, Jeonghyeon ; Shin, Minchul ; Koo, Kyoungchoul ; Kim, Joungho

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., KAIST (Korea Adv. Inst. of Sci. & Technol.), Daejeon, South Korea

fYear

2009

fDate

9-11 Dec. 2009

Firstpage

687

Lastpage

691

Abstract

This paper presents the analysis of the effect of power/ground noise on analog-to-digital converter (ADC). Power/ground noise is one of the noise sources to degrade ADC performance. Power distribution networks of off-chip and on-chip are modeled to analyze the mount of noise coupling and frequency response. Also, power/ground noise effect on ADC circuit is analyzed by spice simulation. It is analyzed and simulated that how noise coupled on power and ground can degrade designed flash ADC performance.

Keywords

SPICE; analogue-digital conversion; frequency response; power electronics; SPICE simulation; analog-to-digital converter; frequency response; noise coupling; performance degradation; power distribution networks; power/ground noise effect; Analog-digital conversion; Analytical models; Circuit noise; Circuit simulation; Coupling circuits; Degradation; Frequency response; Network-on-a-chip; Performance analysis; Power systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Packaging Technology Conference, 2009. EPTC '09. 11th

Conference_Location

Singapore

Print_ISBN

978-1-4244-5099-2

Electronic_ISBN

978-1-4244-5100-5

Type

conf

DOI

10.1109/EPTC.2009.5416463

Filename

5416463