Design and simulation of a package solution for millimeter wave MEMS switch

In the RF area MEMS devices are mainly used as switches that utilize mechanical movement to achieve a short or an open circuit in a RF transmission line. RF MEMS switches have shown great potential for the development of a wide range of low loss, low power and low cost systems. It is widely recognized that the advantages offered by the MEMS switch technology cannot be achieved without an appropriate package that will shield and protect the switch, as well as an interconnect technology that will allow for easy RF and DC signal transition in and out of the package. Low loss, wide bandwidth hermetic packages are therefore essential for practical high performance RF MEMS devices. The interconnection to such packaging techniques presents the largest challenge to RF performance. For an interconnection to function largely independent of frequency, the impedance of the interconnection must be maintained throughout the bonding interface. Although it is used very common in packaging ICs for its characteristics such as simplicity and low cost, wire bonding can not fulfil the requirement of RF MEMS packaging because of the defection existing in the package. In this paper, we present the design, simulation and manufacturing of a package solution with lightweight, small size and short electric path length for a millimeter wave MEMS switch structure. To achieve this goal, we used the ultra thin silicon substrate as a packaging substrate. The via holes for vertical feed-through were fabricated on the thin silicon wafer by wet chemical processing. Then, via holes were filled and micro-bumps were fabricated by electroplating. To make up hermetic sealing, metal bonding was used in the sealing line. The switch before and after packaging were simulated by using Ansoft HFSS respectively, and S-parameters simulated show that the package structure has a small impact on the performance of switch, so that we can package the MEMS devices without loss and interference by using the vertical fee- d-through. Especially, by using the ultra thin silicon wafer we can realize a device package with low-cost, lightweight and small size. In addition, we can extend a 3-D packaging structure by stacking assembled thin packages.