DocumentCode
3527971
Title
Design and implementation of an FPGA-Based high performance ASIC for open loop PWM inverter
Author
Nandhakumar, R. ; Jeevananthan, S. ; Dananjayan, P.
Author_Institution
Deparment of EEE, Pondicherry Eng. Coll., Pondicherry
fYear
2006
fDate
19-21 Dec. 2006
Firstpage
349
Lastpage
354
Abstract
This paper presents a field programmable gate array (FPGA) based application specific integrated circuit (ASIC) for open loop inverters used in uninterrupted power supply (UPS) application. Many research works have been reported recently on inverter performance enhancement through carrier and reference modifications. The main aim of this work is to get a generalized algorithm, which can successfully reproduce the conventional and modified carrier and reference functions in a digital platform. A systematic digital (regular sampled) implementation of conventional sinusoidal pulse width modulation (SPWM) and the other high performance natural sampled PWM techniques are presented. The PWM modulator design is based on the Xilinx Spartan 3 XC3s400 FPGA and performance is verified with the prototype inverter.
Keywords
PWM invertors; application specific integrated circuits; field programmable gate arrays; integrated circuit design; uninterruptible power supplies; ASIC; FPGA; application specific integrated circuit; open loop PWM inverter; sinusoidal pulse width modulation; uninterrupted power supply; Application specific integrated circuits; Educational institutions; Field programmable gate arrays; Logic circuits; Power engineering and energy; Prototypes; Pulse width modulation; Pulse width modulation inverters; Uninterruptible power systems; Voltage; FPGA; Programmable architecture; Sinusoidal PWM inverter; Total Harmonic Distortion (THD);
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics, 2006. IICPE 2006. India International Conference on
Conference_Location
Chennai
Print_ISBN
978-1-4244-3450-3
Electronic_ISBN
978-1-4244-3451-0
Type
conf
DOI
10.1109/IICPE.2006.4685396
Filename
4685396
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