Diagnosis Algorithms for Locating Bridge Defects in Multi-Port RAMs

Multi-port random access memory (MPRAM) is widely used in system-on-chip (SOC) designs. This paper presents two defect-location algorithms (DLAs) for locating the bridge defects between word-lines and bit-lines in a MPRAM. Once faulty rows or faulty columns are detected by a typical test for functional faults, the DLAs can be used to locate bridge defects between bit-lines or word-lines if such bridge defects exist. For a k-port MPRAM, the proposed word-line DLA and bit-line DLA requires (4k + 9)m and 10n test operations to locate bit-line and word-line bridge defects if the MPRAM with m detected faulty rows and n detected faulty columns.