DocumentCode
3532746
Title
High-speed low input impedance CMOS current comparator
Author
Khucharoensin, Surachel ; Kasemsuwan, Varakorn
Author_Institution
Dept. of Electron., King Mongkut´´s Inst. of Technol., Ladkrabang, Thailand
Volume
1
fYear
2003
fDate
25-28 May 2003
Abstract
A simple high-speed low input impedance CMOS current comparator is proposed. The circuit uses improved Wilson current-mirror to perform a subtraction. Negative feedback is employed to reduce the input impedance of the circuit. HSPICE is used to verify the circuit performance with a standard 0.5μm CMOS technology. Simulation results demonstrate the propagation delay of 1.02 ns, average power consumption of 0.911 mW and input impedance of 137 Ω for ±0.1μA input current at the supply voltage of 3V.
Keywords
CMOS analogue integrated circuits; SPICE; circuit feedback; current comparators; current mirrors; high-speed integrated circuits; 0.1 muA; 0.5 micron; 0.911 mW; 3 V; HSPICE simulation; Wilson current mirror; current subtraction; high-speed CMOS current comparator; input impedance; negative feedback; CMOS technology; Circuit optimization; Circuit simulation; Current supplies; Energy consumption; Feedback circuits; Impedance; Negative feedback; Propagation delay; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1205520
Filename
1205520
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