• DocumentCode
    3534340
  • Title

    FPGA-based acceleration of neural network for ranking in web search engine with a streaming architecture

  • Author

    Yan, Jing ; Xu, Ning-Yi ; Cai, Xiong-Fei ; Gao, Rui ; Wang, Yu ; Luo, Rong ; Feng-hsiung Hsu

  • Author_Institution
    Hardware Comput. Group, Microsoft Res. Asia, Beijing, China
  • fYear
    2009
  • fDate
    Aug. 31 2009-Sept. 2 2009
  • Firstpage
    662
  • Lastpage
    665
  • Abstract
    Web search engine companies are intensively running learning to rank algorithms to improve the search relevance. Neural network (NN)-based approaches, such as LambdaRank, can significantly increase the ranking quality. While, their training is very slow on a single computer and inherent coarse-grained parallelism could be hardly utilized by computer clusters. Thus an efficient implementation is necessary to timely generate acceptable NN models on frequently updated training datasets. This paper presents our work in accelerator. A SIMD streaming architecture is proposed to i) efficiently map the query-level NN computation and data structure to FPGA, ii) fully exploit the inherent fine-grained parallelism, and iii) provide scalability to large scale datasets. The accelerator shows up to 17.9X speedup over the software implementation on datasets from a commercial search engine.
  • Keywords
    Internet; data structures; field programmable gate arrays; learning (artificial intelligence); neural nets; parallel algorithms; query processing; search engines; FPGA-based acceleration; LambdaRank algorithm; SIMD streaming architecture; Web search engine ranking; Web search relevance; coarse-grained parallelism; computer cluster; data structure; large-scale dataset scalability; learning method; neural network-based approach; query-level NN computation; software implementation; training method; Acceleration; Clustering algorithms; Computer architecture; Concurrent computing; Data structures; Neural networks; Parallel processing; Search engines; Service oriented architecture; Web search;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on
  • Conference_Location
    Prague
  • ISSN
    1946-1488
  • Print_ISBN
    978-1-4244-3892-1
  • Electronic_ISBN
    1946-1488
  • Type

    conf

  • DOI
    10.1109/FPL.2009.5272343
  • Filename
    5272343