• DocumentCode
    3541357
  • Title

    Low-voltage green transistor using hetero-tunneling

  • Author

    Bowonder, Anupama ; Pate, Pratik ; Jeon, Kanghoon ; Oh, Jungwoo ; Majhi, Prashant ; Tseng, Hsing-Huang ; Hu, Cheming

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA
  • fYear
    2008
  • fDate
    15-16 June 2008
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    A novel hetero-tunnel transistor (HtFET) with a heterostructure parallel to the dielectric interface is proposed for low-voltage (low-power) electronics. Its potential of scaling Vdd down to 0.2 V is examined with quantum mechanical tunneling theory. Data from high-K metal-gate, Si on Ge hetero-tunnel transistor verifies the HtFET concept.
  • Keywords
    Ge-Si alloys; dielectric materials; field effect transistors; low-power electronics; quantum theory; semiconductor heterojunctions; technology CAD (electronics); HtFET concept; Si-Ge; TCAD simulation; dielectric interface; hetero-tunneling; heterostructure; high-K metal-gate; low-power electronics; low-voltage electronics; low-voltage green transistor; quantum mechanical tunneling theory; Computer science; Drives; Electrons; Energy consumption; High K dielectric materials; High-K gate dielectrics; Medical simulation; Quantum mechanics; Transistors; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4244-2071-1
  • Type

    conf

  • DOI
    10.1109/SNW.2008.5418440
  • Filename
    5418440
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3541357