A ± 1.5 V high frequency four quadrant current multiplier

Author

Arthansiri, Teerawat ; Kasemsuwan, Varakorn ; Ahn, Hyung Keun

Author_Institution

Dept. of Electron., King Mongkut´´s Inst. of Technol., Bangkok, Thailand

fYear

2005

fDate

23-26 May 2005

Firstpage

1016

Abstract

This paper presents a four quadrant current multiplier based on the square-law characteristic of a MOS transistor operating in the saturation region. The current multiplier consists of four quadratic cells using only NMOS transistors. The circuit operates using the supply voltages of ±1.5 V and with the quiescent current of 25 μA. The nonlinearity is 0.36% when the input current is the same as the bias current and reduced to only 0.1% when the input current is reduced by half. The cut-off frequency is 413 MHz with a total harmonic distortion less than 0.15% (at 1 MHz). The power dissipation is 0.45 mW.

Keywords

MOS analogue integrated circuits; analogue multipliers; 0.45 mW; 1 MHz; 1.5 V; 25 muA; 3 V; 413 MHz; MOS transistor saturation region operation; MOS transistor square-law characteristic; four quadrant analog multiplier; high frequency current multiplier; quadratic cells; Adaptive signal processing; Circuits; Clocks; Frequency; MOS devices; MOSFETs; Power dissipation; Total harmonic distortion; Transconductance; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1464763

Filename

1464763