A 10-Gbps, 8-PAM parallel interface with crosstalk cancellation for future hard disk drive channel ICs

The paper presents a new system architecture for future hard disk channel ICs based on a high-speed digital parallel interface. A crosstalk cancellation technique using a novel data encoding scheme is proposed to suppress electromagnetic interference (EMI) generated by the I/Os. This technique is implemented utilizing a novel 8-4-PAM signaling with a data look-ahead algorithm. Simulations show a 37% crosstalk reduction for six adjacent channels each operating at 10 Gbps. The key circuit components in the high-speed interface transceiver, including the receive sampler, the phase interpolator and the transmitter output driver, are described in detail. Designed in a 0.13-μm digital CMOS process, the transceiver, excluding the test logic, consumes 310 mW from a 1-V supply based on simulation results.