• DocumentCode
    3542957
  • Title

    Asynchronous SIMD: an architectural concept for high performance image processing

  • Author

    Weems, Charles

  • Author_Institution
    Comput. Sci. Dept., Massachusetts Univ., Amherst, MA, USA
  • fYear
    1997
  • fDate
    20-22 Oct 1997
  • Firstpage
    235
  • Lastpage
    242
  • Abstract
    Traditional single-instruction multiple-data (SIMD) array processors have fallen out of favor for a long list of reasons. Most of these problems can be traced to the synchronous and monolithic nature of the array. The article lists the problems that derive from those characteristics and then proposes an asynchronous variation on the SIMD array that appears to have considerable potential for addressing the problems of SIMD while retaining its most attractive features. This architecture is presented as an interesting concept that is worth further exploration in the research community
  • Keywords
    image processing; parallel architectures; SIMD array processors; architectural concept; asynchronous SIMD; high performance image processing; monolithic array; synchronous array; Bandwidth; Clocks; Communication channels; Computer science; Costs; Counting circuits; Frequency measurement; Image processing; Microprocessors; Signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture for Machine Perception, 1997. CAMP 97. Proceedings. 1997 Fourth IEEE International Workshop on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-7987-5
  • Type

    conf

  • DOI
    10.1109/CAMP.1997.632024
  • Filename
    632024