20–80nm Channel length InGaAs gate-all-around nanowire MOSFETs with EOT=1.2nm and lowest SS=63mV/dec

Author

Gu, J.J. ; Wang, X.W. ; Wu, Huwei ; Shao, Jin ; Neal, A.T. ; Manfra, Michael J. ; Gordon, Roy G. ; Ye, Peide D.

Author_Institution

Birck Nanotechnol. Center, Purdue Univ., West Lafayette, IN, USA

fYear

2012

fDate

10-13 Dec. 2012

Abstract

In this paper, 20nm-80nm channel length (L_ch) InGaAs gate-all-around (GAA) nanowire MOSFETs with record high on-state and off-state performance have been demonstrated by equivalent oxide thickness (EOT) and nanowire width (W_NW) scaling down to 1.2nm and 20nm, respectively. SS and DIBL as low as 63mV/dec and 7mV/V have been demonstrated, indicating excellent interface quality and scalability. Highest I_ON = 0.63mA/μm and g_m = 1.74mS/μm have also been achieved at V_DD=0.5V, showing great promise of InGaAs GAA technology for 10nm and beyond high-speed low-power logic applications.

Keywords

III-V semiconductors; MOSFET; gallium arsenide; indium compounds; nanowires; DIBL; EOT; GAA nanowire MOSFET; InGaAs; SS; channel length; equivalent oxide thickness; gate-all-around nanowire MOSFET; high on-state performance; high-speed low-power logic applications; interface quality; interface scalability; nanowire width; off-state performance; size 1.2 nm; size 10 nm; size 20 nm to 80 nm; voltage 0.5 V; Aluminum oxide; Indium gallium arsenide; Logic gates; MOSFETs; Nanoscale devices; Performance evaluation;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2012 IEEE International

Conference_Location

San Francisco, CA

ISSN

0163-1918

Print_ISBN

978-1-4673-4872-0

Electronic_ISBN

0163-1918

Type

conf

DOI

10.1109/IEDM.2012.6479117

Filename

6479117