Electric field for detecting open leads in CMOS logic circuits by supply current testing

Open leads are one type of defect occurring frequently when logic circuits are implemented on printed circuit boards (PCBs) with ICs. A powerful supply current test method has been proposed for detecting an open lead in a CMOS logic circuit. The method is based on the supply current of a circuit under test which flows when a time-varying electric field is supplied from the outside of the circuit. The paper proposes a time-varying electric field which enables us to detect open leads in a CMOS logic circuit with an inexpensive test setup.