• DocumentCode
    3546449
  • Title

    VLSI implementation of type-2 fuzzy inference processor

  • Author

    Huang, Shih-Hsu ; Chen, Yi-Rung

  • Author_Institution
    Dept. of Electron. Eng., Chung Yuan Christian Univ., Chung Li, Taiwan
  • fYear
    2005
  • fDate
    23-26 May 2005
  • Firstpage
    3307
  • Abstract
    The main concept of type-2 fuzzy logic is that "words mean different things to different people"; thus, there are uncertainties associated with words. Recently, a lot of mathematical theorems have been developed for type-2 fuzzy logic. However, to the best of our knowledge, there has been no hardware implementation. In this paper, we propose the first hardware architecture to support the type-2 fuzzy inference execution. Moreover, we also use a 0.35μm cell library to implement the proposed architecture. Implementation data show that the inference speed reaches 3.125 MFLIPS with 2 inputs, 1output and 64 rules.
  • Keywords
    VLSI; fuzzy logic; inference mechanisms; parallel architectures; pipeline processing; uncertainty handling; 0.35 micron; VLSI implementation; cell library; hardware architecture; type-2 fuzzy inference processor; type-2 fuzzy logic; uncertainties; Bismuth; Fuzzy control; Fuzzy logic; Fuzzy sets; Hardware; Libraries; Mathematical model; Minimax techniques; Uncertainty; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
  • Print_ISBN
    0-7803-8834-8
  • Type

    conf

  • DOI
    10.1109/ISCAS.2005.1465335
  • Filename
    1465335