A test strategy for time-to-digital converters using dynamic element matching and dithering

Author

Liu, Wenbo ; Xing, Hanqing ; Jin, Le ; Geiger, Randall ; Chen, Degang

Author_Institution

Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA

fYear

2005

fDate

23-26 May 2005

Firstpage

3809

Abstract

This work presents a cost-effective test structure that is applicable to built-in self-test of time-to-digital converters (TDCs). The proposed structure uses deterministic dynamic element matching and dithering to generate linear time interval excitations for precision TDC test. Transition time points of a TDC can be measured with picosecond accuracy by using the proposed strategy, which enables the test and calibration of TDCs used in jitter characterization of communications systems with multigigabit-per-second data rates.

Keywords

analogue-digital conversion; built-in self test; calibration; digital communication; jitter; telecommunication equipment testing; TDC test; built-in self-test; calibration; communications systems; cost-effective test structure; deterministic dynamic element matching; dithering; jitter characterization; linear time interval excitations; multi-gigabit-per-second data rates; test strategy; time-to-digital converters; transition time points; Automatic testing; Built-in self-test; Calibration; Circuit testing; Delay lines; Integrated circuit measurements; Integrated circuit testing; Jitter; System testing; Time measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465460

Filename

1465460