DocumentCode
3547773
Title
A single-chip FPGA design for real-time ICA-based blind source separation algorithm
Author
Charoensak, Charayaphan ; Sattar, Farook
Author_Institution
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
fYear
2005
fDate
23-26 May 2005
Firstpage
5822
Abstract
Blind source separation (BSS) of independent sources from their mixtures is a common problem in real world multi-sensor applications. In this paper, we propose an efficient hardware architecture for the implementation of real-time BSS that can be implemented using a low-cost FPGA. The architecture offers a good balance between hardware requirement (gate count and minimal clock speed) and separation performance. The FPGA design implements the modified Torkkola BSS algorithm for audio signals based on the ICA (independent component analysis) technique. The separation is performed by implementing noncausal filters, instead of the typical causal filters, within the feedback network. The architecture of the hardware is described. Results of various FPGA simulations and real-time testing of the final hardware design in a real environment are given.
Keywords
blind source separation; circuit feedback; digital filters; field programmable gate arrays; independent component analysis; real-time systems; sensor fusion; BSS; blind source separation; feedback network; hardware architecture; independent component analysis; independent sources; low-cost FPGA; modified Torkkola algorithm; multi-sensor applications; noncausal filters; real-time ICA; single-chip FPGA design; Algorithm design and analysis; Blind source separation; Clocks; Feedback; Field programmable gate arrays; Filters; Hardware; Independent component analysis; Signal design; Source separation;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1465962
Filename
1465962
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