VLSI block placement with alignment constraints based on corner block list

The corner block list (CBL) is an excellent representation of block floorplan/placement. In this paper, we give a sufficient and necessary condition for the feasibility of a CBL and alignment constraints in CBL are also dealt with. A method is proposed to identify a topological relation between any two blocks in CBL. We also find a sufficient and necessary condition to judge whether a CBL is feasible or not under alignment constraints. The experimental results have demonstrated the efficiency and effectiveness of the proposed method.