• DocumentCode
    3548440
  • Title

    A bandwidth efficient subsampling-based block matching architecture for motion estimation

  • Author

    Chin, Huo-Yun ; Cheng, Chao-Chung ; Lin, Yu-Kun ; Chang, Tian-Sheuan

  • Author_Institution
    Dept. of Electron. Eng., Nat. Chiao Tung Univ., HsinChu, China
  • Volume
    2
  • fYear
    2005
  • fDate
    18-21 Jan. 2005
  • Abstract
    We have developed a new pel subsampling-based search hardware for motion estimation called quartet-pel motion estimation (QME). The memory access of search range memory can be reduced to 25%. The computational complexity can also be reduced to 25% with respect to full-search block matching algorithm (FBIMA). On the other hand, flexible and efficient hardware architecture is also implemented. The flexibility is based on the configuration of processing unit, and adjustable candidate number. In addition, complete verification and testing methods are also considered.
  • Keywords
    computational complexity; formal verification; image matching; image sampling; motion estimation; parallel architectures; adjustable candidate number; bandwidth efficient subsampling-based block matching architecture; computational complexity; full-search block matching algorithm; hardware architecture; memory access reduction; pel subsampling-based search hardware; processing unit configuration; quartet-pel motion estimation; search range memory; Bandwidth; Chaos; Computational complexity; Computer architecture; Content addressable storage; Electronic mail; Hardware; Motion compensation; Motion estimation; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
  • Print_ISBN
    0-7803-8736-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2005.1466601
  • Filename
    1466601