DocumentCode
3548445
Title
Design and implementation of an SDH high-speed switch
Author
Zhang, De Hui ; Zhao, Quan Liang ; Han, Jun Gang
Author_Institution
Dept. of Comput. Sci., Xi´´an Inst. of Post & Telecommun., China
Volume
2
fYear
2005
fDate
18-21 Jan. 2005
Abstract
In this short paper, we propose a design of SDH high-speed switch, which can switch 16×16 STM-16 streams with speed at 2.488 Gbit/s. In this design a novel fabric structure was used to perform nonblocking connection of STM-1 data in any timeslot of 16-bit parallel STM-16 data rate at 155.5MB/s. The prototype of the design is implemented in Altera´s Stratix™ GX FPGA devices. The test results show that the prototype meets all requirements.
Keywords
circuit CAD; field programmable gate arrays; high-speed integrated circuits; integrated circuit design; logic circuits; synchronous digital hierarchy; 155.5 MByte/s; 16 bit; 2.488 Gbit/s; SDH high-speed switch; STM-1 data; nonblocking connection; parallel STM-16 data rate; Application specific integrated circuits; Clocks; Communication switching; Computer science; Fabrics; Field programmable gate arrays; Performance evaluation; Prototypes; Switches; Synchronous digital hierarchy;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN
0-7803-8736-8
Type
conf
DOI
10.1109/ASPDAC.2005.1466606
Filename
1466606
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