DocumentCode
3549793
Title
A new strained-SOI/GOI dual CMOS technology based on local condensation technique
Author
Tezuka, Tsutomu ; Nakaharai, Shu ; Moriyama, Yoshihiko ; Hirashita, Norio ; Toyoda, Eiji ; Sugiyama, Naoharu ; Mizuno, Tomohisa ; Takagi, Shin-ichi
Author_Institution
MIRAI-ASET, Kawasaki, Japan
fYear
2005
fDate
14-16 June 2005
Firstpage
80
Lastpage
81
Abstract
Strained Si-on-insulator NMOSFETs and strained SiGe-on-insulator PMOSFETs were integrated, for the first time, using the local condensation technique. Both P- and NMOSFETs exhibited significant mobility and current drive enhancements. Furthermore, ultrathin-body SOI NMOSFETs and strained Ge-on-Insulator PMOSFETs were also integrated. Over 4 times higher hole-mobility enhancement was achieved in the GOI-PMOSFET, resulting in a comparable current drive with the NMOSFET.
Keywords
CMOS integrated circuits; Ge-Si alloys; MOSFET; condensation; hole mobility; silicon-on-insulator; CMOS technology; Si-on-insulator NMOSFET; SiGe; SiGe-on-insulator PMOSFET; condensation technique; hole-mobility; CMOS technology; Capacitive sensors; Ceramics; Electron mobility; Fabrication; Germanium silicon alloys; MOS devices; MOSFETs; Silicon germanium; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN
4-900784-00-1
Type
conf
DOI
10.1109/.2005.1469220
Filename
1469220
Link To Document