DocumentCode
355233
Title
Epitaxial lift-off for wafer-scale GaAs-on-Si semi-monolithic integration
Author
Wei Chang ; Goertemiller, M. ; Verma, A. ; Yablonovitch, Eli
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear
1996
fDate
2-7 June 1996
Firstpage
492
Lastpage
493
Abstract
Summary form only given. We have developed a manufacturable epitaxial lift-off process to integrate a 2" GaAs epi-layer containing active photonic devices onto a much larger 5" processed Si VLSI wafer. The availability of this ELO hetero-integration process will be extremely valuable in high-performance and reliable optoelectronic integrated systems.
Keywords
III-V semiconductors; gallium arsenide; integrated circuit technology; integrated optoelectronics; optical fabrication; semiconductor epitaxial layers; silicon; wafer-scale integration; 2 in; 5 in; ELO hetero-integration; GaAs-Si; VLSI; active photonic device; epitaxial lift-off; optoelectronic integrated system; wafer-scale GaAs-on-Si semi-monolithic integration; Current measurement; Dark current; Detectors; Gallium arsenide; Indium gallium arsenide; PIN photodiodes; Photodetectors; Substrates; Thermal degradation; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Lasers and Electro-Optics, 1996. CLEO '96., Summaries of papers presented at the Conference on
Conference_Location
Anaheim, CA, USA
Print_ISBN
1-55752-443-2
Type
conf
Filename
864970
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