DocumentCode
3552752
Title
Resistless fabrication of integrated circuits
Author
O´Keeffe, T.W. ; Handy, R.M.
Author_Institution
Westinghouse Research Laboratories, Pittsburgh, Pa.
Volume
13
fYear
1967
fDate
1967
Firstpage
148
Lastpage
148
Abstract
The chemical etch rate of solicon dioxide layers can be increased typically 3 to 4 times by bombardment with energetic, electrons. It was shown earlier that this phenomenon could be used to produce diffusion windows and hence to fabricate planar silicon devices without any photo-resist steps. The excellent resolution capabilities (<0.6 micron holes) of the bombardment enhanced etch rate (BEER) process make it attractive for fabrication of micron size devices and large arrays provided that the proper bombardment patterns can be generated.
Keywords
Apertures; Artificial intelligence; Chemicals; Electron beams; Etching; Fabrication; Floods; Laboratories; Resists; Silicon devices;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1967 International
Type
conf
DOI
10.1109/IEDM.1967.187912
Filename
1474993
Link To Document