A high current silicon transistor with low saturation voltage

The theory and construction of an npn silicon transistor with less than 200 millivolts saturation voltage at 75 amperes are presented. To achieve a low saturation voltage requires low collector resistivity, high forward and inverse alphas collector-to-emitter current gain) at high current, and low resistance metal contacts. A p-type epitaxial base layer grown on a heavily doped n-type substrate provides the low collector bulk resistance. Diffused emitters in tee form of long narrow stripes provide good high-current forward alpha by maximizing the emitter periphery near where most of the current flows. A p+ surface layer on the base provides a built-in field keeping minority carriers away from surface recombination centers. This improves both forward and inverse alphas. The high collector doping, and an emitter area as nearly equal to the collector area as possible, results in high inverse alpha. Silver emitter and base stripes plated on evaporated aluminum-chromium ohmic contacts provide the necessary low resistance to maintain uniform current diffusion.