DSA enhancement - Depletion MOS IC

To achieve high-speed and low-power logic, MOS integrated circuits with submicron effective channel length have been constructed. In the diffusion self-aligned structure, the effective channel is determined by the length of impurity side-diffusion. The same diffusion is effectively utilized to make an enhancement-mode MOST for the amplifier and to leave the load MOST in depletion mode. This enhancement-depletion composition has the merits of low supply voltage (down to 1.5 V) and high speed. Furthermore, in this configuration the noise margin to NFBis insensitive to variation of the gate-oxide thickness and has a wide allowance for the surface concentration of the diffused base layer.